The present invention relates generally to a computing system having a cache and a system memory, and more specifically, to a computing system for storing data from the cache to the system memory in anticipation of a subsequent cache flush.
In a computer system, it may become necessary to evict data from a cache, which is commonly referred to as a cache flush. For example, cache flushes may be necessary during a dynamic storage re-allocation event. As part of the operation of the cache flush, a directory state for each cache location (also referred to as a cache entry) is searched to determine whether the cache location contains valid data, and if so, if the data has been modified since accessed from the system memory of the computer system. Any cache locations that contain valid data that has not been modified since being accessed from the system memory of the computer system may simply have the directory state updated to mark the cache locations as invalid. However, cache locations that contain modified data first have a copy of the data stored back to the system memory before the directory state is updated.
Cache flushes generally need to be performed in a quiesced state (i.e., pausing or altering the state of running processes on the computer system) to avoid re-populating the cache location with new data as the cache flush is being performed. Thus, it is generally important that the cache flush be completed relatively quickly. However, as cache sizes have continued to grow, the amount of time to process all of the entries in the cache has continued to grow as well, which results in a longer period of time processors are in a quiesced state, thus impacting overall system performance.
It should also be noted that while cache sizes continue to grow in size, the size or width and speed of a bus between the cache and the system memory generally has remained about the same. The size and speed of the bus determines how much data may be transferred between the cache and the system memory in given period of time. Thus, saving each cache location to the system memory each time the cache location is updated may become time-consuming due to the limited bandwidth of the bus.